Vasileios Porpodas


I am a compiler engineer at Google in the Bay Area.

Before joining Google, I worked at Intel in Santa Clara, and before that I was a research associate at the Computer Laboratory, University of Cambridge in Dr Timothy M. Jones's group.

I did my Ph.D. at the CArD Group, School of Informatics, University of Edinburgh under the supervision of Professor Marcelo Cintra. My work was on code generation for scalable low-power VLIW processors (thesis).


I am interested in projects related to compiler optimizations, software reliability and computer architecture.

Publications (DBLP) (Google Scholar)